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 Advanced Process Technology Surface Mount (IRFZ46NS) l Low-profile through-hole (IRFZ46NL) l 175C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free Description
l l
IRFZ46NSPBF IRFZ46NLPbF
HEXFET(R) Power MOSFET
D
PD - 95158
VDSS = 55V RDS(on) = 0.0165
G
Advanced HEXFET(R) Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2Pak is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. The through-hole version (IRFZ46NL) is available for lowprofile applications.
ID = 53A
S
D 2 P ak
T O -26 2
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max. 53
37 180 3.8 107 0.71 20 28 11 5.0 -55 to + 175 300 (1.6mm from case )
Units
A W W W/C V A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
--- ---
Max.
1.4 40
Units
C/W
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1
04/22/04
IRFZ46NS/LPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance V(BR)DSS IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss EAS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Single Pulse Avalanche Energy Min. 55 --- --- 2.0 19 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID =1mA .0165 VGS =10V, ID = 28A 4.0 V VDS = VGS, ID = 250A --- S VDS = 25V, ID = 28A 25 VDS = 55V, VGS = 0V A 250 VDS = 44V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V 72 ID = 28A 11 nC VDS = 44V 26 VGS = 10V, See Fig. 6 and 13 --- VDD = 28V --- ID = 28A ns --- RG = 12 --- RD = 0.98, See Fig. 10 Between lead, nH 7.5 --- and center of die contact 1696 --- VGS = 0V 407 --- pF VDS = 25V 110 --- = 1.0MHz, See Fig. 5 583 152 IAS = 28A, L = 389mH Typ. --- 0.057 --- --- --- --- --- --- --- --- --- --- 14 76 52 57
Source-Drain Ratings and Characteristics
IS
I SM
V SD t rr Q rr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 53 showing the A G integral reverse --- --- 180 p-n junction diode. S --- --- 1.3 V TJ = 25C, IS = 28A, VGS = 0V --- 67 101 ns TJ = 25C, IF = 28A --- 208 312 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by Starting TJ = 25C, L = 389H
TJ 175C. RG = 25, IAS = 28A. (See Figure 12)
max. junction temperature. ( See fig. 11 )
Pulse width 400s; duty cycle 2%. Uses IRFZ46N data and test conditions. This is a typical value at device destruction and represents
operation outside rated limits.
ISD 28A, di/dt 220A/s, VDD V(BR)DSS,
This is a calculated value limited to TJ = 175C. Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 39A.
** When mounted on 1" square PCB (FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
2
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IRFZ46NS/LPbF
1000
TO P VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
1000
I , D rain-to-S ou rc e C urre nt (A ) D
BO TTOM
I , D rain-to-S ource C urrent (A ) D
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
100
10
10
4.5 V
4.5 V
1 0.1 1
2 0 s P U L S E W ID T H TJ 25 C T C = 25C
10 100
A
1 0.1 1
2 0 s P U L S E W ID T H TJ 17 5C T C = 175C
10 100
A
V D S , D rain-to-S ource V oltage (V )
V DS , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
R D S (on) , Drain-to-S ource O n Resistance (N orm alized)
I D = 4 6A
I D , D rain-to-So urce C urren t (A )
2.0
100
TJ = 2 5C TJ = 1 7 5C
1.5
1.0
10
0.5
1 4 5 6 7
V DS = 2 5V 2 0 s P U L S E W ID TH
8 9 10
A
0.0 -60 -40 -20 0 20 40 60 80
V G S = 10 V
100 120 140 160 180
A
V G S , G ate-to -So urce Voltag e (V)
T J , Junction T em perature (C )
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRFZ46NS/LPbF
2800
2400
C , Capacitance (pF)
2000
C iss
1600
C oss
1200
V G S , G ate-to-S ource V oltage (V )
V GS C iss C rs s C o ss
= = = =
0V , f = 1MHz C g s + C g d , C d s S H O R TE D C gd C ds + C g d
20
I D = 28 A V D S = 44 V V D S = 28 V
16
12
8
800
C rss
400
4
0 1 10 100
A
0 0 10 20 30
FO R TE S T C IR C U IT S E E FIG U R E 1 3
40 50 60
A
V D S , D rain-to-S ourc e V oltage (V )
Q G , T otal G ate C harge (nC )
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
I SD , Reverse D rain C urrent (A)
O P E R A T IO N IN T H IS A R E A L IM ITE D B Y R D S (o n)
I D , D rain Current (A )
100
100
10s
T J = 1 75 C T J = 25 C
10
100s
10
1m s
1 0.4 0.8 1.2 1.6
V G S = 0V
2.0
A
2.4
1 1
T C = 25 C T J = 17 5C S ing le P u lse
10
10m s
100
A
V S D , S ourc e-to-D rain V oltage (V )
V D S , D rain-to-S ource V oltage (V )
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFZ46NS/LPbF
60 50 Limited By Package
VDS VGS RG
RD
D.U.T. VDD
+
ID , Drain Current (A)
40 30
10V
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
20 10 0 25 50 75 100 125 150 175 T C , Case Temperature (C)
10% VGS
td(on) tr t d(off) tf
VDS 90%
Fig 9. Maximum Drain Current Vs. Case Temperature
10
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.10 0.1 0.05 0.02 0.01
SINGLE PULSE (THERMAL RESPONSE) 0.0001 0.001 0.01
0.01 0.00001
Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.1
P DM t1 t2 1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFZ46NS/LPbF
500
E A S , S ingle Pulse Avalanc he E nergy (m J)
VDS
L D.U.T.
TOP
400
B O TT O M
ID 11 A 2 0A 28 A
RG
+
V - DD
300
10 V
IAS tp
0.01
200
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp VDD VDS
100
0
V D D = 25 V
25 50 75 100 125 150
175
A
S tarting T J , J unc tion T em perature (C )
IAS
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
Current Regulator Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50K
QG
12V
.2F .3F
10 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFZ46NS/LPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ V DD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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7
IRFZ46NS/LPbF
D2Pak Package Outline
D2Pak Part Marking Information (Lead-Free)
T H I S IS AN IR F 5 30 S WIT H L OT COD E 8 02 4 AS S E MB L E D ON WW 02 , 20 00 IN T H E AS S E MB L Y L IN E "L " N ote: "P " in as s embly line pos ition indicates "L ead-F ree" IN T E R N AT IONAL R E CT I F IE R L OGO AS S E MB L Y L OT COD E P AR T N U MB E R F 53 0S D AT E CODE YE AR 0 = 20 00 WE E K 0 2 L IN E L
OR
INT E R NAT ION AL R E CT IF IE R L OGO AS S E MB L Y L OT COD E P AR T N U MB E R F 53 0S DAT E COD E P = DE S IGNAT E S L E AD -F R E E P R ODU CT (OP T IONAL ) YE AR 0 = 2000 WE E K 02 A = AS S E MB L Y S IT E COD E
8
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IRFZ46NS/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
E XAMP L E : T H IS IS AN IR L 3103L L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" Note: "P " in as s embly line pos ition indicates "L ead-F ree" IN T E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R
DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C
OR
IN T E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE P AR T NU MB E R DAT E CODE P = DE S IGNAT E S L E AD-F R E E P R ODU CT (OP T IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE
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9
IRFZ46NS/LPbF
D2Pak Tape & Reel Information
TR R
1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 ( .1 6 1 ) 3 .9 0 ( .1 5 3 )
1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 )
0 .3 6 8 (.0 1 4 5 ) 0 .3 4 2 (.0 1 3 5 )
F E E D D IR E C T IO N
1 .8 5 ( .0 7 3 ) 1 .6 5 ( .0 6 5 )
1 1 .6 0 (.4 5 7 ) 1 1 .4 0 (.4 4 9 )
1 5 .4 2 (.6 0 9 ) 1 5 .2 2 (.6 0 1 )
2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 )
TR L
1 0 .9 0 (.4 2 9 ) 1 0 .7 0 (.4 2 1 ) 1 .7 5 (.0 6 9 ) 1 .2 5 (.0 4 9 ) 1 6 .1 0 ( .6 3 4 ) 1 5 .9 0 ( .6 2 6 ) 4 .7 2 (.1 3 6 ) 4 .5 2 (.1 7 8 )
F E E D D IR E C T IO N
1 3 .5 0 ( .5 3 2 ) 1 2 .8 0 ( .5 0 4 )
2 7 .4 0 ( 1 .0 7 9 ) 2 3 .9 0 ( .9 4 1 ) 4
3 3 0 .0 0 ( 1 4 .1 7 3 ) M AX.
6 0 .0 0 (2 .3 6 2 ) M IN .
NO TES : 1 . C O M F O R M S T O EIA-4 1 8 . 2 . C O N T R O L L IN G D IM EN S IO N : M IL L IM E T ER . 3 . D IM E N S IO N M E A S U R E D @ H U B . 4 . IN C L U D E S F L A N G E D IS T O R T IO N @ O U T E R E D G E .
3 0 .4 0 (1 .1 9 7 ) M AX. 2 6 .4 0 ( 1 .0 3 9 ) 2 4 .4 0 ( .9 6 1 ) 3
4
Data and specifications subject to change without notice. This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 4/04
10
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